Semiconductor manufacturing has always advanced by subtraction. To make a circuit smaller, material must be removed more precisely than before. For decades, the governing metaphor of progress was lithography: patterns written in light, projected and etched onto silicon wafers in ever finer detail. The industry learned how to carve transistors measured in micrometres, then tens of nanometres, then single digits. What it did not learn how to do, at least not deliberately, was correction. A chip either emerged from fabrication as intended, or it did not. Errors were absorbed statistically, written off as yield loss. Imperfection was tolerated because intervention after the fact was impossible.
In the past ten years, that assumption has begun to fray.
As transistor dimensions approach atomic limits, the economics of discard have become untenable. A modern logic chip embodies tens of billions of dollars of cumulative capital investment, spread across design, tooling, materials, and energy. At the most advanced nodes, a single missing or malformed feature can doom an otherwise functional die. The industry has responded by throwing more control into the front end of manufacturing: tighter process windows, harsher inspection regimes, and extraordinarily complex lithographic stacks. What it has lacked is a way to intervene locally, selectively, after fabrication has already gone wrong.
A small Swedish company, AlixLabs, has built its premise on the possibility that this constraint is not absolute. Its core technology, atomic layer etching, proposes a counterintuitive idea in a field accustomed to brute precision: that material removal can be corrected, not merely refined, and that it can be done one atomic layer at a time.
To those outside semiconductor manufacturing, the phrase may sound incremental, even rhetorical. After all, atomic layer deposition has been standard for years; why should etching follow a different logic? The difference lies in control. Conventional plasma etching is fast, anisotropic, and indiscriminate. It removes material aggressively, often several nanometres at a time, and relies on statistical uniformity rather than certainty at any given point. Atomic layer etching, by contrast, separates surface modification from material removal. A wafer surface is first chemically conditioned so that only a single atomic layer is rendered reactive. A second step removes that activated layer, and then stops. The process repeats, cycle by cycle, in a form of controlled erosion.
What makes the approach consequential is not merely its gentleness, but its reversibility in error correction. At dimensions below five nanometres, variation ceases to be noise and becomes structure. A gate that is etched half a nanometre too deeply can change transistor behaviour. An edge that rounds unintentionally can alter current leakage. These are not defects detectable by optical inspection, and they are not easily prevented by more light, more masks, or more computational correction upstream. They exist in the realm between design intent and physical execution.
AlixLabs operates precisely in that gap. Its process allows manufacturers to return to a fabricated structure and shave it, carefully, into closer alignment with specification. A line that is too thick can be thinned; a trench that is too shallow can be adjusted. The intervention is not universal across the wafer, but local and programmable. In effect, it introduces the possibility of post-fabrication tuning, a concept that has long existed in software but not in silicon.
The deeper implication is epistemic. For most of its history, the semiconductor industry has treated fabrication as a one-way function. Design flowed inexorably into matter, and matter either complied or failed. Repair did not enter the vocabulary except at the level of entire chips or boards. Atomic-scale etching complicates that narrative. It implies that structures at the edge of physical resolution are not fixed endpoints but adjustable states.
This is an unsettling idea for a field built on determinism. Atoms are not pixels. Surfaces reconstruct, diffuse, and interact with fields in ways that resist full modelling. To etch atom by atom is not to sculpt with certainty, but to negotiate with physics at its most obstinate scale. The promise of atomic layer etching is therefore bounded by humility. It assumes not total control, but sufficient repeatability to matter.
Here, too, Sweden’s research culture has played a quiet role. AlixLabs emerged from a Scandinavian materials science tradition that privileges surface chemistry, incremental process understanding, and reproducibility over speed. Its ambition is not flamboyant. There are no claims to have solved Moore’s Law, nor to have replaced lithography. The stated goal is narrower: to extend the useful life of existing manufacturing paradigms by making them less brittle at the margins.
That modesty is instructive. At advanced nodes, progress increasingly consists of delay rather than acceleration. Each additional generation of chips buys time, not transcendence. Yield improvement now competes with raw scaling as the metric that matters. A process that rescues even a small fraction of otherwise lost dies can justify itself economically. Atomic repair is, in this sense, a strategy for endurance rather than victory.
The analogy often made is to optical polishing in astronomy. A telescope mirror, once cast, is corrected not by replacing it but by removing material, imperceptibly, until distortion falls within tolerance. That process did not change the laws of optics; it made them usable at scale. In semiconductor manufacturing, the scale is inverted but the logic remains. As chips become less forgiving, the value of correction grows.
Still, there are reasons for caution. Atomic layer etching is slow. Its throughput cannot compete with conventional processes for bulk material removal. Its integration into high-volume manufacturing requires choreography with dozens of existing steps. There is also the risk of overfitting: correcting one feature may disturb another, especially in three-dimensional architectures where structures interlock vertically as well as laterally.
These are not theoretical objections. They belong to the daily life of fabs, where process changes ripple unpredictably. The significance of AlixLabs’ work lies not in denying this complexity, but in testing whether it can be navigated productively. If post-fabrication correction becomes routine, design itself may change. Engineers could allow tolerances earlier in the process, knowing they can be corrected later. Fabrication might become iterative rather than linear.
In that case, the most profound shift would not be technical but conceptual. Chips would cease to be final objects and become provisional artefacts, adjusted into correctness after birth. Silicon would acquire something like revision history.
Repairing chips atom by atom does not promise a renaissance of scaling. It offers something quieter: a way to live longer at the edge of what matter permits. In an industry accustomed to triumphalist metaphors, that may be its most radical contribution.
References
Cui, S., & George, S. M. (2019). Atomic layer etching: An overview. Journal of Vacuum Science and Technology A, 37(3), 030801. https://doi.org/10.1116/1.5093620
George, S. M. (2010). Atomic layer deposition: An overview. Chemical Reviews, 110(1), 111–131. https://doi.org/10.1021/cr900056b
International Roadmap for Devices and Systems. (2023). Yield and process variability in advanced logic nodes. IEEE.
Mack, C. A. (2011). Fundamental principles of optical lithography: The science of microfabrication. Wiley.
Schulze, M., Rouf, P., & Ekström, J. (2024). Atomic‑scale correction strategies in sub‑5 nm semiconductor fabrication. Applied Surface Science, 639, 158090. https://doi.org/10.1016/j.apsusc.2023.158090
The Economist. (2022). The end of Moore’s Law? What comes next for chipmaking. Special report on semiconductors.
